1. Technical Field of the Invention
The present invention relates to a method and apparatus for DC offset cancellation, particularly but not exclusively in Automatic Gain Control circuits for zero intermediate frequency (ZIF) receivers.
2. Description of Related Art
In wireless communication systems, it is well known to convert the high frequency signal, received at an antenna, directly into a baseband signal without first being converted to an intermediate frequency. A block diagram of a generic zero intermediate frequency (ZIF), also known as a homodyning, circuit 10 is shown in FIG. 1. RF signals are received at an antenna 20 and are passed through a low noise amplifier arrangement 30 into a mixer 40. The output of the mixer 40 is a baseband signal. The baseband signal is pre-amplified at a receiver amplifier 50 which is AC coupled to a receiver filter 60, having common mode feedback, via an AC coupling capacitor 70. The baseband signal, filtered to remove higher harmonics by the filter 60, enters an AGC circuit 80 which amplifies the baseband signal further.
An AGC circuit is a cascade of individual AGC amplifiers that work together to scale the very small voltages received by the antenna system 20 up to a signal that is large enough to work within the processing block of the receiver. A cascade of amplifiers is used rather than a single amplifier to avoid the requirement of a single very large gain amplifier. Amplifiers with larger gains tend to have less linear amplification curves, which results in a distorted signal that is harder to process.
The baseband output of AGC circuit 80 is capacitively coupled to a buffer 85, which is typically unity gain but may be a 2× buffer amplifier for example. The output of the buffer 85 is passed to an analog to digital converter (ADC) 90 after which further signal processing (not shown) occurs.
It is well known that ZIF receivers introduce error signals in the form of DC offset signals, at various stages in the receiver. If left uncorrected, such signals can cause difficulties in later stages, for example errors in baseband digitization or saturation of the ADC 90. There are several sources of such DC offset in a ZIF transceiver. The AC coupling capacitor 70 between the pre-amplifier 50 and the filter 60 removes any DC offsets in the mixer 40 and pre-amplifier 50 before they reach the AGC circuit 80 or filter 60, and avoids the need for a feedback loop from the output of the filter 60 back to the pre-amplifier 50 (the common mode feedback is instead about the filter alone, as shown in FIG. 1).
The AGC circuit 80 also has the potential to introduce a DC offset into the filtered baseband signal. The amplifiers in the AGC circuit are voltage differential amplifiers that have a variable voltage gain and amplify the difference between the amplifier inputs at each amplifier in the chain. In practice, the photolithographic and other techniques used to manufacture the transistors that form the differential amplifier result in those transistors not being identical. The result of this is that a proportion of the difference between the differential amplifier outputs is a result of the mismatch between the transistors (for example, a difference in gate areas) and not simply a result of a difference between the amplifier inputs. The amplitude of this DC offset tends to vary as a function of time, temperature and other parameters. The most straightforward way to prevent this AGC DC offset from propagating through to the output of the AGC circuit 80 is to provide an AC coupling capacitor between each amplifier stage to decouple the DC offset from a first amplifier output from the subsequent amplifier stage. Such a solution suffers from a number of problems, particularly when the AGC circuit is amplifying a baseband signal with a large bandwidth and whose frequency extends down to the kHz range. For example, where the ZIF transceiver is part of a Wireless LAN (WLAN) operating with the 802.11a, 802.11b or other standard, the baseband frequency extends from tens of MHz down to perhaps 100 kHz.
The AC coupling capacitors in an AGC circuit act effectively as high pass filters because the input impedance of each subsequent amplifier provides the resistive component of each such RC filter. Thus, in order to allow the baseband signal to be amplified substantially without attenuation, it is necessary that the coupling capacitors present a filter cut-off (−3 dB) at no more than, say, 10% of the lower baseband frequency range, i.e., the filter cut-off needs to be around 10 kHz.
When the gain of the amplifiers in the AGC chain is altered, to maintain a constant output amplitude in response to a changing input voltage amplitude, the DC offset changes. The AGC circuit then has a settling period following the change in gain, while the coupling capacitors reach steady state once more. This is related to the time constant R*C. The resistance R of the filter is typically fixed (for example, by the fixed input impedance of the subsequent amplifier in the AGC). In order to avoid attenuating the baseband signal, therefore, it is necessary to employ relatively large capacitances and a relatively lengthy settling time. A further consequence of the large capacitance is that it tends to preclude device integration.
While this settling time may be acceptable for narrowband signals, for wireless LAN signals such as those broadcast using the 802.11a and 802.11b protocols, that settling time is not acceptable. In the worst case scenario of 802.11a, the total time available to recalibrate the dc offset of the AGC may be less than 1 μs. Failure of the AGC circuit to settle in this time period results in errors potentially being introduced into the data contained in the baseband signal, when it is subsequently converted from analog to digital. Decreasing the capacitance to reduce the settling time simply results in the wanted baseband signal being attenuated by the increased high pass filter cut-off frequency.
EP A2 1,172,928 shows an alternative approach to DC offset correction in a ZIF wireless receiver. Here, a dynamic calculation of the error signal value in the baseband signal is performed at the ADC, on each digital sample, using an error correction algorithm. The calculated error is converted to an analog value and subtracted from the baseband signal at the output of the mixers.
Still further approaches are disclosed in U.S. Pat. No. 6,324,230 and U.S. Pat. No. 5,742,899, which seek to provide an improved settling time for the AGC. However, in both cases, the received signal is a narrow band signal.
None of the foregoing arrangements is particularly suitable to address the problem of very fast settling which becomes a requirement in, for example, 802.11 baseband signal DC offset correction. Decreasing the capacitance in a simple AC coupling arrangement simply attenuates the baseband signal, and attempting to use the arrangements of the above-mentioned US patents in particular to attain such fast settling speeds results in complex and potentially unstable feedback control.
The present invention accordingly seeks to provide an improved approach to DC offset correction in an amplifier circuit.